b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer cypress semiconductor corporation 525 los coches st. document#: 38-07105 rev. ** 5/24/2001 milpitas, ca 95035. tel: 408-263-6300, fax: 408-263-6571 page 1 of 7 http://www.cypress.com product features ? 200mhz clock support ? lvpecl or lvcmos/lvttl clock input ? lvcmos/lvttl compatible inputs ? 18 clock outputs: drive up to 36 clock lines ? 150ps maximum output-to-output skew ? dual or single supply operation: 3.3v core and 3.3v outputs 3.3v core and 2.5v outputs 2.5v core and 2.5v outputs ? pin compatible with mpc940l ? industrial temp. range: -40c to +85c ? 32-pin lqfp package block diagram figure 1 description the b9940l is a low voltage clock distribution buffer with the capability to select either a differential lvpecl or a lvcmos/lvttl compatible input clock. the two clock sources can be used to provide for a test clock as well as the primary system clock. all other control inputs are lvcmos/lvttl compatible. the eighteen outputs are 2.5v or 3.3v compatible and can drive two series terminated 50 ? transmission lines. with this capability the b9940l has an effective fan-out of 1:36. low output-to-output skews make the b9940l an ideal clock distribution buffer for nested clock trees in the most demanding of synchronous systems. pin configuration b9940l q0 q1 q2 vddc q3 q4 q5 vss q17 q16 q15 vss q14 q13 q12 vddc q6 q7 q8 vdd q9 q10 q11 vss vss vss tclk tclk_sel pecl_clk pecl_clk# vdd vddc 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 pecl_clk pecl_clk# 0 1 tclk tclk_sel vddc 18 q0-q17 vdd
b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer cypress semiconductor corporation 525 los coches st. document#: 38-07105 rev. ** 5/24/2001 milpitas, ca 95035. tel: 408-263-6300, fax: 408-263-6571 page 2 of 7 http://www.cypress.com pin description pin name pwr i/o description 5 pecl_clk i, pu pecl input clock. 6 pecl_clk# i, pd pecl input clock. 3 tclk i, pd external reference/test clock input. 9, 10, 11, 13, 14, 15, 18, 19, 20, 22, 23, 24, 26, 27, 28, 30, 31, 32 q(17:0) vddc o clock outputs. 4 tclk_sel i, pd clock select input. when low, pecl clock is selected and when high tclk is selected. 8, 16, 29 vddc 3.3v or 2.5v power supply for output clock buffers. 7, 21 vdd 3.3v or 2.5v power supply 1, 2, 12, 17, 25 vss common ground pd = internal pull-down, pu = internal pull-up.
b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer cypress semiconductor corporation 525 los coches st. document#: 38-07105 rev. ** 5/24/2001 milpitas, ca 95035. tel: 408-263-6300, fax: 408-263-6571 page 3 of 7 http://www.cypress.com maximum ratings maximum input voltage relative to vss: vss - 0.3v maximum input voltage relative to vdd: vdd + 0.3v storage temperature: -65 c to + 150 c operating temperature: -40 c to +85 c maximum esd protection 2kv maximum power supply: 5.5v maximum input current: 20ma this device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, precautions should be taken to avoid application of any voltage higher than the maximum rated voltages to this circuit. for proper operation, vin and vout should be constrained to the range: vss<(vin or vout) b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer cypress semiconductor corporation 525 los coches st. document#: 38-07105 rev. ** 5/24/2001 milpitas, ca 95035. tel: 408-263-6300, fax: 408-263-6571 page 4 of 7 http://www.cypress.com ac parameters 1 symbol parameter min typ max units conditions fmax maximum input frequency 200 mhz 2.0 3.5 4.0 vdd = 3.3v tpd pecl_clk to q delay 2,4 2.6 4.0 5.2 ns vdd = 2.5v 1.8 3.3 3.8 vdd=3.3v tpd ttl_clk to q delay 2,4 2.3 3.8 4.4 ns vdd = 2.5v foutdc output duty cycle 2,3,4 45 55 % measured at vddc/2 150 vdd=3.3v, fin = 150mhz tskew output-to-output skew 2,4 200 ps vdd=2.5v, fin = 150mhz 1.4 pecl, vddc = 3.3v tskew(pp) part-to-part skew 5 2.2 ns pecl, vddc = 2.5v 1.2 tclk, vddc = 3.3v tskew(pp) part-to-part skew 5 1.7 ns tclk, vddc = 2.5v 850 pecl_clk tskew(pp) part to part skew 6 750 ps tclk 0.3 1.1 0.7v to 2.0v, vddc = 3.3v tr / tf output clocks rise / fall time 2,4 0.3 1.2 ns 0.5v to 1.8v, vddc = 2.5v vdd = 3.3v 5% or 2.5v 5%, vddc = 3.3v 5% or 2.5v 5%, ta = -40 c to +85 c note 1: parameters are guaranteed by design and characterization. not 100% tested in production. all parameters specified with loaded outputs. note 2: outputs driving 50 ? transmission lines. note 3: 50% input duty cycle. note 4: outputs loaded with 30pf each note 5: across temperature and voltage ranges, includes output skew note 6: for a specific temperature and voltage, includes output skew
b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer cypress semiconductor corporation 525 los coches st. document#: 38-07105 rev. ** 5/24/2001 milpitas, ca 95035. tel: 408-263-6300, fax: 408-263-6571 page 5 of 7 http://www.cypress.com package drawing and dimensions (32 lqfp) 32 pin lqfp outline dimensions inches millimeters symbol min nom max min nom max a - - 0.063 - - 1.60 a 1 0.002 - 0.006 0.05 - 0.15 a2 0.053 - 0.057 1.35 - 1.45 d - 0.354 - - 9.00 - d 1 - 0.276 - - 7.00 - b 0.012 - 0.018 0.30 - 0.45 e 0.031 bsc 0.80 bsc l 0.018 - 0.030 0.45 - 0.75 ordering information part number package type production flow B9940LBL 32 pin lqfp industrial, -40 c to +85 c note: the ordering part number is formed by a combination of device number, device revision, package style, and screening as shown below. marking: example: imi B9940LBL date code, lot # B9940LBL package l = lqfp revision device number d d 1 a 2 b e 10 a l a 1
b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer cypress semiconductor corporation 525 los coches st. document#: 38-07105 rev. ** 5/24/2001 milpitas, ca 95035. tel: 408-263-6300, fax: 408-263-6571 page 6 of 7 http://www.cypress.com notice cypress semiconductor corporation reserves the right to change or modify the information contained in this data sheet, without notice. cypress semiconductor corporation does not assume any liability arising out of the application or use of any product or circuit described herein. cypress semiconductor corporation does not convey any license under its patent rights nor the rights of others. cypress semiconductor corporation does not authorize its products for use as critical components in life-support systems or critical medical instruments, where a malfunction or failure may reasonably be expected to result in significant injury to the user.
b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer cypress semiconductor corporation 525 los coches st. document#: 38-07105 rev. ** 5/24/2001 milpitas, ca 95035. tel: 408-263-6300, fax: 408-263-6571 page 7 of 7 http://www.cypress.com document title: b9940l 2.5v / 3.3v, 200 mhz, 1:18 clock distribution buffer document number: 38-07105 rev. ecn no. issue date orig. of change description of change ** 107509 06/14/01 ndp convert from imi to cypress
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